Welcome to the Dynetix Design Solutions web site. Please contact us for further information of our company or products.

Latest Company News

• March 29, 2011 - V2sim and RaceCheck support VHDL-2008 and IEEE 1850 PSL
• Jan 15, 2011 - Terence Chan presented advanced race logic synthesis technologies at APCCAS-10
• July 15, 2010  -  US Patent and Trademark office issued US 7,757,121 to Dynetix
• Jan 5, 2009  -  Terence Chan presented an advanced RaceCheck paper at APCCAS-08
• June 2, 2008  - V2sim and RaceCheck provide native support for IEEE SystemC language
• Feb 25, 2008  - US Patent and Trademark Office Issued US Patent 7,334,203 to Terence Chan
• Jan 2, 2008    - Dynetix products are endorsed at the University of Central Florida
• June 10, 2007 - Dynetix licensed US and Canadian patents
• Dec 12, 2006  - Terence Chan Presented a RaceCheck^TM paper at the IEEE APCCAS-06 conference
• June 12, 2006 - Canadian Intellectual Property Office issued a Canadian Patent to Terence Chan

Our Mission

Create a world class company to champion innovation and cutting-edge IC design solutions and products to aid customers success.

Company Profile

Dynetix Design Solutions is an electronic design automation (EDA) company, founded by Terence Chan.

We specializes in the development of state-of-the-art design verification tools to solve the most challenging design issues for deep submicron ASIC, FPGA, SoC and custom IC products.

Our products, V2Sim^TM and  RaceCheck^TM are the industrial-first  32/64-bit design verification tools that seamlessly verifies HDL/ESL designs coded in any combination of VHDL, Verilog, SystemVerilog, SystemC and PSL languages.  Their patented technologies significantly aid customers time-to-market and improve products quality.

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