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Canadian Intellectual Property Office Issued a Canadian Patent to Terence Chan

Canadian Patent CA 2,397,302

June 12, 2006

The Canadian Intellectual Property Office issued a Canadian patent, CA 2,397,302, to Terence Chan, CEO and President of Dynetix Design Solutions, on April 25, 2006.

The patent, which mirrors Terence Chan's US patent (6,466,898), covers state-of-the-art multithreaded HDL simulation technologies on advanced multiprocessor platforms, and advanced technologies in mixed HDL languages simulation, cross-platform remote simulation, and cross-platform simulation jobs scheduling. 

According to Terence Chan, the Canadian patent and the US patent together solidify Dynetix Design Solutions technical leadership position in the cutting-edge multithreaded HDL/ESL simulation market. Furthermore, they will make it extremely difficult for Dynetix competitors to infringe on Dynetix's technologies.

With the advance of multi-CPU and multithreaded CPU computers,  V2SimTM, the industrial-first  multithreaded HDL/ESL simulator, can scale with the latest hardware to further accelerate the verification of billion-plus gate deep-submicron  System-on-Chip (SoC), ASIC, and FPGA designs. However, legacy HDL/ESL verification tools from other EDA vendors do not scale with the multi-core and multithreaded computers. 

Dynetix's state-of-the-art products significantly reduce customers' new IC product development time and aid time-to-market.

 


For More Information Contact:

Dynetix Design Solutions
3268 Ridgefield Way, Dublin, CA 94568 USA
Tel: 925-833-7851
Internet: info@dynetix.com

 

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