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V2SimTM Product Features
 | State-of-the-art multithreaded technologies for superior scalable performance
on advanced multi-core, multithreaded computers |
| Based on US patent (US 6,466,898) and Canadian Patent (CA
2,397,302) technologies |
| Single kernel for seamless verification of VHDL, Verilog and
SystemVerilog designs |
| 64-bit
processing on advanced 64-bit platforms |
| Single Java GUI on all UNIX,
Linux and WindowsTM
platforms |
| Supports OVM, TLM, directed-assertion and coverage-driven
verifications |
| Allows
users to compile and simulate on any networked UNIX, Linux and WindowsTM
platforms |
| Plug-and-play ready with advanced ASIC, FPGA, SoC and custom IC design methodologies |
Key Benefits
| Superior scalable performance on multi-core, multithreaded computers renders 10x or more speedup in IC
verification |
| Help reduces new IC products development time by 30% or more, and time-to-market |
| Designed for SoC - allows users mix-and-match IP's coded in any Verilog,
VHDL, SystemVerilog languages |
| 64-bit processing to handle large-scale deep submicron SoC designs
with billions of logic gates |
| Learn once and use everywhere same Java GUI on all supported platforms |
| Patented remote simulation and job scheduling technologies aids users
utilize all network resources and time-to-market |
| Complements RaceCheckTM to aid users achieve 100% functional
coverage of their regression tests |
Supported Platforms
| Intel CentrinoTM, XeonTM and PentiumTM,
Core-2/4, running Solaris 10/x86, Windows XP/Vista or Linux |
| AMD OpteronTM, running Solaris 10/x86, Windows
XP/Vista or Linux |
| Sun UltraSparcTM III/IV, running Solaris 10 |
| HP PA-RISCTM, running HPUX |
Supported Languages
| IEEE 1364-2005 (Verilog) |
| IEEE 1076 (VHDL) |
| IEEE 1164 (Vital) |
| IEEE 1800 (SystemVerilog) |
| IEEE 1666 (SystemC) |
Please email
us for further product information
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