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V2Sim

 

 

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V2SimTM Product Features

bulletState-of-the-art multithreaded technologies for superior scalable performance on advanced multi-core, multithreaded computers
bulletBased on US patent (US 6,466,898) and Canadian Patent (CA 2,397,302) technologies
bulletSingle kernel for seamless verification of VHDL, Verilog and  SystemVerilog designs
bullet64-bit processing on  advanced 64-bit platforms
bulletSingle Java GUI on all  UNIX, Linux and WindowsTM platforms
bulletSupports OVM, TLM, directed-assertion and coverage-driven verifications
bulletAllows users to compile and simulate on any networked UNIX, Linux and WindowsTM platforms
bulletPlug-and-play ready with advanced ASIC, FPGA, SoC and custom IC design methodologies

Key Benefits

bulletSuperior scalable performance on multi-core, multithreaded computers renders 10x or more speedup in IC verification
bulletHelp reduces new IC products development time by 30% or more, and time-to-market
bulletDesigned for SoC - allows users mix-and-match IP's coded in any Verilog, VHDL, SystemVerilog languages
bullet64-bit processing to handle large-scale deep submicron SoC designs with billions of logic gates
bulletLearn once and use everywhere same Java GUI on all supported platforms
bulletPatented remote simulation and job scheduling technologies aids users utilize all network resources and time-to-market
bulletComplements RaceCheckTM to aid users achieve 100% functional coverage of their regression tests

Supported Platforms

bulletIntel CentrinoTM, XeonTM and PentiumTM, Core-2/4, running Solaris 10/x86, Windows XP/Vista or Linux
bulletAMD OpteronTM, running Solaris 10/x86, Windows XP/Vista or Linux
bulletSun UltraSparcTM III/IV, running Solaris 10
bulletHP PA-RISCTM, running HPUX 

Supported Languages

bulletIEEE 1364-2005 (Verilog)
bulletIEEE 1076 (VHDL)
bulletIEEE 1164 (Vital)
bulletIEEE 1800 (SystemVerilog)
bulletIEEE 1666 (SystemC)

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